1. Field of the Invention
The embodiments discussed herein are related to a semiconductor device having the overcurrent protection function of detecting that an overcurrent flows through two power devices that are connected in series (hereinafter, also referred to as “totem-pole-connected”).
2. Background of the Related Art
With inverters or converters the following circuit structure is adopted. Power devices are totem-pole-connected and high-side and low-side power devices are driven by drive circuits. That is to say, on a high side a signal generated by a pulse generation circuit with a ground potential as reference is level-shifted by a level shift circuit and is then transmitted to a high-side drive circuit to on-off drive the high-side power device. On the other hand, on a low side a signal generated with the ground potential as reference is transmitted to a low-side drive circuit to on-off drive the low-side power device.
A totem pole midpoint, which is a connection point of the low-side power device and the high-side power device, is connected to an inductive load such as a motor. As a result, external noise caused by an inductive load, parasitic inductance, or the like may be superimposed on the totem pole midpoint. At this time a potential at the totem pole midpoint goes into an overshooting state or an undershooting state, depending on the magnitude, timing, or the like of the noise. That is to say, a potential at the totem pole midpoint becomes higher than or equal to a high-voltage potential of the high-side power device or becomes lower than or equal to the ground potential.
When a potential at the totem pole midpoint becomes lower than the ground potential, an off signal may be outputted from the pulse generation circuit to the high-side power device. In that case, on the high side the level shift circuit does not normally transmit the signal to the high-side drive circuit. As a result, the high-side power device does not turn off at timing at which it needs to turn off. That is to say, the high-side power device remains on. Accordingly, the original switching function is not maintained.
A technique for meeting a case where a high-side power device does not turn off at timing at which it needs to turn off is known (see, for example, Japanese Laid-open Patent Publication No. 2004-120152). According to the technique disclosed in, for example, Japanese Laid-open Patent Publication No. 2004-120152, a second off signal is outputted a determined time after a first off signal is outputted. As a result, even if the level shift circuit does not normally transmit the first off signal to the high-side drive circuit, the level shift circuit normally transmits the second off signal to the high-side drive circuit. This avoids a functional malfunction.
With the technique disclosed in, for example, Japanese Laid-open Patent Publication No. 2004-120152, however, the first off signal and the second off signal are simply outputted mechanically at a certain interval. There is a possibility that even when the determined time has elapsed, new external noise will be generated. That is to say, in essence, a malfunction is not completely avoided.
Accordingly, the following technique is proposed. The determination that the level shift circuit does not normally transmit a reset signal for putting the high-side power device into an off state is made and a second reset signal is regenerated (see, for example, International Publication Pamphlet No. WO2015/045534). A semiconductor device disclosed in, for example, International Publication Pamphlet No. WO2015/045534 includes a high-side potential detection circuit which detects a high-side potential and a high-side potential determination circuit which outputs an event signal on the basis of a change in the high-side potential detected by the high-side potential detection circuit. With this semiconductor device a pulse generation circuit regenerates a reset signal according to an event signal outputted from the high-side potential determination circuit and an input logic signal inputted from the outside. That is to say, the high-side potential determination circuit monitors the high-side potential (reference potential or a power source potential) detected by the high-side potential detection circuit. When the high-side potential determination circuit determines that there is a change in high-side potential which impedes the transmission of a reset signal by the level shift circuit, the high-side potential determination circuit outputs an event signal. If timing at which the pulse generation circuit receives the event signal from the high-side potential determination circuit falls on timing at which the reset signal is generated, the pulse generation circuit regenerates a reset signal. When the transmission of a reset signal is impeded in this way by external noise, a reset signal is regenerated. As a result, the high-side power device is reliably turned off.
With the semiconductor device disclosed in, for example, International Publication Pamphlet No. WO2015/045534, when an event signal which is indicative that the transmission of a reset signal may be impeded is outputted at reset timing at which the high-side power device is turned off, a reset signal is regenerated. By doing so, the high-side power device is reliably turned off. However, for example, if dead time (which is set for preventing a short circuit between an upper arm and a lower arm and which is delay time from the time when one power device is turned off to the time when the other power device is turned on) for power devices totem-pole-connected is short, if the influence of external noise is not negligible, or if a high-side potential changes for a long period, an off signal may be outputted behind regular timing. In such a case, the low-side power device is turned on before the high-side power device is turned off. As a result, a short circuit occurs between the upper arm and the lower arm and an overcurrent flows through the power devices. An overcurrent is detected on the low side. This causes an unintentional cessation of operation.